Circuito Somador Carry Ripple - Pedroni

Estrutura

• Unidades de somadores completos (FAs) conectadas em série através do carry out.
• Possui um processo sensível as entradas a, b e carry in. Incrementa as funções de propagação da saída e do carry out através de um for loop.

VHDL

Código

--Book: Pedroni/488 --8 bits library ieee; use ieee.std_logic_1164.all; entity carry_ripple_adder is generic (n: integer := 8); --number of bits port (a,b : in std_logic_vector (n-1 downto 0); cin: in std_logic; s: out std_logic_vector (n-1 downto 0); cout: out std_logic); end carry_ripple_adder; architecture structure of carry_ripple_adder is begin process (a,b,cin) variable carry: std_logic_vector (n downto 0); begin carry(0) := cin; for i in 0 to n-1 loop s(i) <= a(i) xor b(i) xor carry(i); carry(i+1) := (a(i) and b(i)) or (a(i) and carry(i)) or (b(i) and carry(i)); end loop; cout <= carry(n); end process; end architecture;

Testbench

Código

--rising_edge( clock ) then -- Testbench created online at: -- www.doulos.com/knowhow/perl/testbench_creation/ -- Copyright Doulos Ltd -- SD, 03 November 2002 library IEEE; use IEEE.Std_logic_1164.all; use IEEE.Numeric_Std.all; entity carry_ripple_adder_tb is generic (Nbits: integer := 4); end; architecture bench of carry_ripple_adder_tb is component carry_ripple_adder is generic (n: integer := 4); port (a,b : in std_logic_vector (n-1 downto 0); cin: in std_logic; s: out std_logic_vector (n-1 downto 0); cout: out std_logic); end component; signal a: std_logic_vector (Nbits-1 downto 0); signal b: std_logic_vector (Nbits-1 downto 0); signal cin: std_logic; signal s: std_logic_vector (Nbits-1 downto 0); signal cout: std_logic; begin -- Insert values for generic parameters !! uut: carry_ripple_adder generic map (n => Nbits) port map ( a => a, b => b, cin => cin, s => s, cout => cout); stimulus: process begin a <= "0100"; b <= "0101"; cin <= '0'; wait for 100 ns ; cin <= '1'; wait for 100 ns ; end process; end;

• Resultado Funcional:

• Resultado Temporal:

Simulações

Nº Bits	ALMs	Delay	Caminho Critico	Potência (mW)
4	20	8.806	$\downarrow$ b[0] -> $\downarrow$ cout	131.41
8	20			131.41
32	80			162.19
128	320			227.90

$\uparrow$