VHDL:array type definition

Syntax rule

array ( discrete_range {, ...}) of  element_subtype_indication

Examples

type MY_WORD is array (0 to 31) of BIT;
-- A memory word type with an ascending range.

type DATA_IN is array (7 downto 0) of FIVE_LEVEL_LOGIC;
-- An input port type with a descending range.

type MEMORY is array (INTEGER range <>) of MY_WORD;
-- A memory array type.

type Word is array (NATURAL range <>) of BIT;
type Memory is array (NATURAL range <>) of Word (31 downto 0);
constant A_Word: Word := "10011";
-- The index range of A_Word is 0 to 4

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-- Predefined array types(IEEE Std 1076-2008)
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type BOOLEAN_VECTOR is array (NATURAL range <>) of BOOLEAN;
type BIT_VECTOR is array (NATURAL range <>) of BIT;
type INTEGER_VECTOR is array (NATURAL range <>) of INTEGER;
type REAL_VECTOR is array (NATURAL range <>) of REAL;
type TIME_VECTOR is array (NATURAL range <>) of TIME;