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(Criou página com '{{collapse top| bg=lightgreen | expandir=true |Semestre 2015-2 - Prof. Arliones Hoeller}} {{Cronograma-top}} {{Cl|1 |2/10 | 2 | Introduction to Embedded Systems: History Overview...') |
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(3 revisões intermediárias pelo mesmo usuário não estão sendo mostradas) | |||
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− | {{collapse top| bg=lightgreen | expandir=true |Semestre 2015-2 - Prof. Arliones Hoeller}} | + | {{collapse top| bg=lightgreen | expandir=true |Semestre 2016-1 - Prof. Arliones Hoeller}} |
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+ | {{Cl|1 |22/3 | 2 | Introduction to Embedded Systems: History Overview and Fundamental Concepts. | Lab. Programação}} | ||
+ | {{Cl|2 |29/3 | 2 | Embedded Systems Development: Design Principles. | Lab. Programação}} | ||
+ | {{Cl|3 |1/4 | 2 | Embedded Systems Development: Real-Time Constraints. | Lab. Programação}} | ||
+ | {{Cl|4 |5/4 | 2 | Embedded Systems Development: Implementation Techniques. | Lab. Programação}} | ||
+ | {{Cl|5 |8/4 | 2 | Embedded Systems Development: Testing, Emulation and Debugging Techniques. | Lab. Programação}} | ||
+ | {{Cl|6 |12/4 | 2 | I/O Basics: I/O Ports. / t0: LED Blinking | Lab. Programação}} | ||
+ | {{Cl|7 |15/4 | 2 | I/O Basics: Interrupt Handling. / t1: Light Keyboard | Lab. Programação}} | ||
+ | {{Cl|8 |19/4 | 2 | I/O Basics: Programmed I/O and DMA. / t2: Light Keyboard the Hard Way | Lab. Programação}} | ||
+ | {{Cl|9 |22/4 | 2 | Timers and Counters. | Lab. Programação}} | ||
+ | {{Cl|10 |26/4 | 2 | Watchdog and Real-Time Clock. / A0: Debugging Challenge | Lab. Programação}} | ||
+ | {{Cl|11 |29/4 | 2 | Interfacing to the Analog World: ADC and Sensors. / t3: Digital Voltimeter | Lab. Programação}} | ||
+ | {{Cl|12 |3/5 | 2 | Interfacing to the Analog World: ADC and Sensors. / t4: Sensors | Lab. Programação}} | ||
+ | {{Cl|13 |6/5 | 2 | Interfacing to the Analog World: DAC and Actuators. / t5: Noise Generator | Lab. Programação}} | ||
+ | {{Cl|14 |10/5 | 2 | Networking: Field Buses and CAN. / A1: Sampling Box | Lab. Programação}} | ||
+ | {{Cl|15 |13/5 | 2 | Networking: Wireless Control Networks and IEEE 802.15.4. | Lab. Programação}} | ||
+ | {{Cl|16 |14/5 | 2 | Networking: Ethernet. | Lab. Programação}} | ||
+ | {{Cl|17 |17/5 | 2 | Introduction to Real-Time Systems: Fundamentals and Periodic Scheduling. | Lab. Programação}} | ||
+ | {{Cl|18 |20/5 | 2 | Introduction to Real-Time Systems: Aperiodic Scheduling and Priority Inversion. | Lab. Programação}} | ||
+ | {{Cl|19 |24/5 | 2 | Embedded Real-Time Operating Systems | Lab. Programação}} | ||
+ | {{Cl|20 |27/5 | 2 | Final Project Design | Lab. Programação}} | ||
+ | {{Cl|21 |31/5 | 2 | Final Project Design | Lab. Programação}} | ||
+ | {{Cl|22 |3/6 | 2 | Final Project Design | Lab. Programação}} | ||
+ | {{Cl|23 |4/6 | 2 | Final Project Design – A2: Report and Presentation | Lab. Programação}} | ||
+ | {{Cl|24 |7/6 | 2 | Final Project Implementation | Lab. Programação}} | ||
+ | {{Cl|25 |10/6 | 2 | Final Project Implementation | Lab. Programação}} | ||
+ | {{Cl|26 |14/6 | 2 | Final Project Implementation | Lab. Programação}} | ||
+ | {{Cl|27 |17/6 | 2 | Final Project Implementation | Lab. Programação}} | ||
+ | {{Cl|28 |21/6 | 2 | Final Project Implementation – Checkpoint – Presentation | Lab. Programação}} | ||
+ | {{Cl|29 |24/6 | 2 | Final Project Implementation | Lab. Programação}} | ||
+ | {{Cl|30 |28/6 | 2 | Final Project Implementation | Lab. Programação}} | ||
+ | {{Cl|31 |1/7 | 2 | Final Project Implementation | Lab. Programação}} | ||
+ | {{Cl|32 |5/7 | 2 | Final Project Implementation | Lab. Programação}} | ||
+ | {{Cl|33 |8/7 | 2 | Final Project Implementation – Checkpoint – Presentation | Lab. Programação}} | ||
+ | {{Cl|34 |12/7 | 2 | Final Project Implementation | Lab. Programação}} | ||
+ | {{Cl|35 |15/7 | 2 | Final Project Implementation | Lab. Programação}} | ||
+ | {{Cl|36 |19/7 | 2 | Final Project Implementation | Lab. Programação}} | ||
+ | {{Cl|37 |22/7 | 2 | Final Project Implementation | Lab. Programação}} | ||
+ | {{Cl|38 |26/7 | 2 | Final Project Implementation – A3: Report and Presentation | Lab. Programação}} | ||
+ | {{cronograma-botton |76}} | ||
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+ | {{collapse top|Semestre 2015-2 - Prof. Arliones Hoeller}} | ||
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{{Cronograma-top}} | {{Cronograma-top}} | ||
{{Cl|1 |2/10 | 2 | Introduction to Embedded Systems: History Overview and Fundamental Concepts. | Lab. Redes I}} | {{Cl|1 |2/10 | 2 | Introduction to Embedded Systems: History Overview and Fundamental Concepts. | Lab. Redes I}} | ||
{{Cl|2 |6/10 | 2 | Embedded Systems Development: Design Principles. | Lab. Redes I}} | {{Cl|2 |6/10 | 2 | Embedded Systems Development: Design Principles. | Lab. Redes I}} | ||
− | {{Cl|3 |9/10 | 2 | Embedded Systems Development: Real-Time Constraints. | Lab. Redes I}} | + | {{Cl|3 |9/10 | 2,4 | Embedded Systems Development: Real-Time Constraints. | Lab. Redes I}} |
{{Cl|4 |13/10 | 2 | Embedded Systems Development: Implementation Techniques. | Lab. Redes I}} | {{Cl|4 |13/10 | 2 | Embedded Systems Development: Implementation Techniques. | Lab. Redes I}} | ||
− | {{Cl|5 |16/10 | 2 | Embedded Systems Development: Testing, Emulation and Debugging Techniques. | Lab. Redes I}} | + | {{Cl|5 |16/10 | 2,4 | Embedded Systems Development: Testing, Emulation and Debugging Techniques. | Lab. Redes I}} |
{{Cl|6 |20/10 | 2 | I/O Basics: I/O Ports. | Lab. Redes I}} | {{Cl|6 |20/10 | 2 | I/O Basics: I/O Ports. | Lab. Redes I}} | ||
− | {{Cl|7 |23/10 | 2 | I/O Basics: Interrupt Handling. | Lab. Redes I}} | + | {{Cl|7 |23/10 | 2,4 | I/O Basics: Interrupt Handling. | Lab. Redes I}} |
{{Cl|8 |27/10 | 2 | I/O Basics: Programmed I/O and DMA. | Lab. Redes I}} | {{Cl|8 |27/10 | 2 | I/O Basics: Programmed I/O and DMA. | Lab. Redes I}} | ||
− | {{Cl|9 | | + | {{Cl|9 |6/11 | 2,4 | Timers and Counters. | Lab. Redes I}} |
− | {{Cl|10 | | + | {{Cl|10 |10/11 | 2 | Watchdog and Real-Time Clock. | Lab. Redes I}} |
− | {{Cl|11 | | + | {{Cl|11 |13/11 | 2,4 | Interfacing to the Analog World: ADC and Sensors. | Lab. Redes I}} |
− | {{Cl|12 | | + | {{Cl|12 |17/11 | 2 | Interfacing to the Analog World: DAC and Actuators. | Lab. Redes I}} |
− | {{Cl|13 | | + | {{Cl|13 |20/11 | 2,4 | Introduction to Real-Time Systems: Fundamentals and Periodic Scheduling. | Lab. Redes I}} |
− | {{Cl|14 | | + | {{Cl|14 |24/11 | 2 | Introduction to Real-Time Systems: Aperiodic Scheduling and Priority Inversion. | Lab. Redes I}} |
− | {{Cl|15 | | + | {{Cl|15 |27/11 | 2,4 | Embedded Real-Time Operating Systems | Lab. Redes I}} |
− | {{Cl|16 | | + | {{Cl|16 |1/12 | 2 | Networking: Field Buses and CAN. | Lab. Redes I}} |
− | {{Cl|17 | | + | {{Cl|17 |4/12 | 2,4 | Networking: Wireless Control Networks and IEEE 802.15.4. | Lab. Redes I}} |
− | {{Cl|18 | | + | {{Cl|18 |8/12 | 2 | Networking: Ethernet. | Lab. Redes I}} |
− | {{Cl|19 | | + | {{Cl|19 |11/12 | 2,4 | Final Project: System Vision Document | Lab. Redes I}} |
− | {{Cl|20 | | + | {{Cl|20 |15/12 | 2 | Final Project: System Vision Document – Presentation | Lab. Redes I}} |
− | {{Cl|21 | | + | {{Cl|21 |18/12 | 2,4 | Final Project: Specification and Analysis | Lab Redes I}} |
− | {{Cl|22 | | + | {{Cl|22 |22/12 | 2 | Final Project: Specification and Analysis – Checkpoint | Lab Redes I}} |
− | {{Cl|23 | | + | {{Cl|23 |2/2 | 2 | Final Project: Specification and Analysis – Presentation | Lab Redes I}} |
− | {{Cl|24 | | + | {{Cl|24 |5/2 | 2 | Final Project: Implementation | Lab Redes I}} |
− | {{Cl|25 | | + | {{Cl|25 |12/2 | 2 | Final Project: Implementation – Checkpoint | Lab Redes I}} |
− | {{Cl|26 | | + | {{Cl|26 |16/2 | 2 | Final Project: Implementation | Lab Redes I}} |
− | {{Cl|27 | | + | <!--{{Cl|27 |19/2 | 2 | Final Project: Implementation – Checkpoint | Lab Redes I}}--> |
− | {{Cl|28 | | + | {{Cl|28 |23/2 | 2 | Final Project: Implementation | Lab Redes I}} |
− | {{Cl|29 | | + | {{Cl|29 |26/2 | 2 | Final Project: Implementation – Checkpoint | Lab Redes I}} |
− | {{Cl| | + | {{Cl|29 |27/2 | 2 | Final Project: Implementation | Lab Redes I}} |
− | {{Cl| | + | {{Cl|30 |1/3 | 2 | Final Project: Implementation | Lab Redes I}} |
− | {{Cl| | + | {{Cl|31 |4/3 | 2 | Final Project: Implementation – Presentation | Lab Redes I}} |
− | {{Cl| | + | {{Cl|32 |8/3 | 2 | Final Project: Integration | Lab Redes I}} |
− | {{Cl| | + | {{Cl|33 |11/3 | 2 | Final Project: Integration – Checkpoint | Lab Redes I}} |
− | {{Cl| | + | {{Cl|34 |15/3 | 2 | Final Project: Integration | Lab Redes I}} |
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Edição atual tal como às 13h33min de 22 de março de 2016
Semestre 2016-1 - Prof. Arliones Hoeller | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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